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A Novel Process for SiGe Core-Shell JAM Transistors Fabrication and Thermal Annealing Effect on Its Electrical Performance

Authors

  • Ashish Kumar Email Department of Electrical Engineering, National Cheng Kung University, Taiwan
  • Wen-Hsi Lee Department of Electrical Engineering, National Cheng Kung University, Taiwan

DOI:

https://doi.org/10.30564/ssid.v1i2.1399
Received: 10 November 2019 | Published Online: 16 April 2020

Abstract

In this study, we fabricate Si/SiGe core-shell Junctionless accumulation
mode (JAM)FinFET devices through a rapid and novel process with four
main steps, i.e. e-beam lithography definition, sputter deposition, alloy
combination annealing, and chemical solution etching. The height of Si
core is 30 nm and the thickness of Si/SiGe core-shell is about 2 nm. After
finishing the fabrication of devices, we widely studied the electrical char
acteristics of poly Si/SiGe core-shell JAM FinFET transistors from a view
of different Lg and Wch. A poly-Si/SiGe core -shell JAMFETs was suc
cessfully demonstrated and it also exhibits a superior subthreshold swing
of 81mV/dec and high on/off ratio > 105 when annealing for 1hr at 600°C.
The thermal diffusion process condition for this study are 1hr at 600°C and
6hr at 700°C for comparison. The annealing condition at 700oC for 6 hours
shows undesired electrical characteristics against the other. Results suggests
that from over thermal budget causes a plenty of Ge to precipitate against
to form SiGe thin film. Annealing JAMFETs at low temperature shows
outstanding Subthreshold swing and better swing condition when com
pared to its counterpart i.e. at higher temperature. This new process can still
fabricate a comparable performance to classical planar FinFET in driving
current.

Keywords:

Junctionless-accumulation (JAM) FET, Junctionless (JL) FET, SiGe core-shell, Rapid thermal anneal Subthreshold swing (SS)

References

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2019 Vol.1 No.2

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Article

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Copyright © 2020 Ashish Kumar, Wen-Hsi Lee

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